Research

We aim to improve the security of Field-Programmable Gate Arrays (FPGAs) by adding layers of security to existing FPGAs, and by designing new security-focused FPGA architectures.

Current work involves:

• Binary Bitstream Analysis and Modification
• Bitstream Configuration Locking
• Dynamic Reconfiguration for Logic Locking
• Secure Programming and Deployment
• Development of Novel Tamper-Resistant Architectures for FPGAs

Join Our Lab

If you are interested in joining our team, we want to hear from you! We are always looking for bright self-motiviated students.

Graduate Students: Please use the 'Contact' page on the website to send us your CV and resume.

Undergraduate Students: Interested students are encouraged to contact us after taking Engr 210 or CS 441.